RFMW offers High Performance Clock Solution with Jitter Attenuation

IDTs 8V19N492 Clock Solution w/Jitter Attenuation is optimized for low phase noise and low phase phased-array, 5G applications to 2.94912 GHzRFMW, Ltd. announces design and sales support for a fully integrated FemtoClockĀ® NG jitter attenuator and clock synthesizer from Integrated Device Technology, Inc. (IDT). The 8V19N492 is designed as a high-performance clock solution for conditioning and frequency/phase management of wireless infrastructure radios in 4G, 5G, MIMO and AAS as well as instrumentation and radar. Optimized for low phase noise (-150dBc/Hz (800kHz offset; 245.76MHz clock)), the device supports JESD204B subclass 0 and 1 clocks. Low phase drift enables more effective calibration for phased-array, 5G applications with clock frequency generation up to 2.94912 GHz. A two-stage PLL architecture supports both jitter attenuation and frequency multiplication. The 8V19N492 first stage PLL is the jitter attenuator and uses an external VCXO for best possible phase noise characteristics. The second stage PLL locks on the VCXO-PLL output signal and synthesizes the target frequency. High-fanout offers up to 15 synchronized, configurable, differential, low-noise outputs. Available in a 10 x 10 mm SMT package.

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